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Fix multichannel tool removing vias from reference rule area

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When a copper fill zone shares the same name as a placement rule area,
the multichannel tool's enclosedByArea() queries would match items in
both zones. This caused vias and other routing in the reference area to
be incorrectly removed during repeat layout operations.

Changed findOtherItemsInRuleArea() and findRoutingInRuleArea() to use
the zone's UUID instead of its name when constructing enclosedByArea()
expressions.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/21184
This commit is contained in:
Seth Hillbrand
2026-01-08 08:32:26 -08:00
parent 1a39c8e85f
commit 37d8f151ff
6 changed files with 2719 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files
pcbnew/tools/multichannel_tool.cpp
+8 -31
View File
@@ -212,8 +212,6 @@ bool MULTICHANNEL_TOOL::findOtherItemsInRuleArea( RULE_AREA* aRuleArea, std::set
return aItems.size() > 0;
}
std::vector<BOARD_ITEM*> result;
PCBEXPR_COMPILER compiler( new PCBEXPR_UNIT_RESOLVER );
PCBEXPR_UCODE ucode;
PCBEXPR_CONTEXT ctx, preflightCtx;
@@ -228,23 +226,13 @@ bool MULTICHANNEL_TOOL::findOtherItemsInRuleArea( RULE_AREA* aRuleArea, std::set
preflightCtx.SetErrorCallback( reportError );
compiler.SetErrorCallback( reportError );
bool restoreBlankName = false;
if( aRuleArea->m_zone->GetZoneName().IsEmpty() )
{
restoreBlankName = true;
aRuleArea->m_zone->SetZoneName( aRuleArea->m_zone->m_Uuid.AsString() );
}
wxString ruleText = wxString::Format( wxT( "A.enclosedByArea('%s')" ), aRuleArea->m_zone->GetZoneName() );
// Use the zone's UUID to identify it uniquely. Using the zone name could match other zones
// with the same name (e.g., a copper fill zone with the same name as a rule area).
wxString ruleText = wxString::Format( wxT( "A.enclosedByArea('%s')" ),
aRuleArea->m_zone->m_Uuid.AsString() );
if( !compiler.Compile( ruleText, &ucode, &preflightCtx ) )
{
if( restoreBlankName )
aRuleArea->m_zone->SetZoneName( wxEmptyString );
return false;
}
auto testAndAdd =
[&]( BOARD_ITEM* aItem )
@@ -270,9 +258,6 @@ bool MULTICHANNEL_TOOL::findOtherItemsInRuleArea( RULE_AREA* aRuleArea, std::set
testAndAdd( drawing );
}
if( restoreBlankName )
aRuleArea->m_zone->SetZoneName( wxEmptyString );
return true;
}
@@ -778,15 +763,10 @@ int MULTICHANNEL_TOOL::findRoutingInRuleArea( RULE_AREA* aRuleArea, std::set<BOA
preflightCtx.SetErrorCallback( reportError );
compiler.SetErrorCallback( reportError );
bool restoreBlankName = false;
if( aRuleArea->m_zone->GetZoneName().IsEmpty() )
{
restoreBlankName = true;
aRuleArea->m_zone->SetZoneName( aRuleArea->m_zone->m_Uuid.AsString() );
}
wxString ruleText = wxString::Format( wxT( "A.enclosedByArea('%s')" ), aRuleArea->m_zone->GetZoneName() );
// Use the zone's UUID to identify it uniquely. Using the zone name could match other zones
// with the same name (e.g., a copper fill zone with the same name as a rule area).
wxString ruleText = wxString::Format( wxT( "A.enclosedByArea('%s')" ),
aRuleArea->m_zone->m_Uuid.AsString() );
auto testAndAdd =
[&]( BOARD_CONNECTED_ITEM* aItem )
@@ -816,9 +796,6 @@ int MULTICHANNEL_TOOL::findRoutingInRuleArea( RULE_AREA* aRuleArea, std::set<BOA
}
}
if( restoreBlankName )
aRuleArea->m_zone->SetZoneName( wxEmptyString );
return count;
}
qa/data/pcbnew/issue21184/Test.kicad_sch
+651
View File
@@ -0,0 +1,651 @@
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qa/data/pcbnew/issue21184/issue21184.kicad_pcb
+1243
View File
File diff suppressed because it is too large Load Diff
qa/data/pcbnew/issue21184/issue21184.kicad_pro
+627
View File
@@ -0,0 +1,627 @@
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"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
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0,
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],
[
0,
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1,
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1,
1,
2
],
[
0,
0,
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],
[
0,
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0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
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0,
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],
[
0,
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],
[
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],
[
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2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"footprint_filter": "ignore",
"footprint_link_issues": "warning",
"four_way_junction": "ignore",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"label_multiple_wires": "warning",
"lib_symbol_issues": "warning",
"lib_symbol_mismatch": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"same_local_global_label": "warning",
"similar_label_and_power": "warning",
"similar_labels": "warning",
"similar_power": "warning",
"simulation_model_issue": "ignore",
"single_global_label": "ignore",
"unannotated": "error",
"unconnected_wire_endpoint": "warning",
"undefined_netclass": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "issue21184.kicad_pro",
"version": 3
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
}
],
"meta": {
"version": 4
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "${PROJECTNAME}.csv",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
},
{
"group_by": true,
"label": "Exclude from BOM",
"name": "${EXCLUDE_FROM_BOM}",
"show": true
},
{
"group_by": true,
"label": "Exclude from Board",
"name": "${EXCLUDE_FROM_BOARD}",
"show": true
},
{
"group_by": true,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"include_excluded_from_bom": true,
"name": "Default Editing",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"space_save_all_events": true,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"498bac11-840c-4b9c-8c40-95416b6d764e",
"Root"
],
[
"974a0092-e266-4c17-a0ad-0420d2f0f044",
"Test1"
],
[
"a2e4406d-77db-4c93-91c7-9c2044625396",
"Test2"
]
],
"text_variables": {}
}
qa/data/pcbnew/issue21184/issue21184.kicad_sch
+98
View File
@@ -0,0 +1,98 @@
(kicad_sch
(version 20250114)
(generator "eeschema")
(generator_version "9.0")
(uuid "498bac11-840c-4b9c-8c40-95416b6d764e")
(paper "A4")
(lib_symbols)
(sheet
(at 63.5 63.5)
(size 25.4 12.7)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(stroke
(width 0.1524)
(type solid)
)
(fill
(color 0 0 0 0.0000)
)
(uuid "974a0092-e266-4c17-a0ad-0420d2f0f044")
(property "Sheetname" "Test1"
(at 63.5 62.7884 0)
(effects
(font
(size 1.27 1.27)
)
(justify left bottom)
)
)
(property "Sheetfile" "Test.kicad_sch"
(at 63.5 76.7846 0)
(effects
(font
(size 1.27 1.27)
)
(justify left top)
)
)
(instances
(project "issue21184"
(path "/498bac11-840c-4b9c-8c40-95416b6d764e"
(page "2")
)
)
)
)
(sheet
(at 63.5 83.82)
(size 25.4 12.7)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(stroke
(width 0.1524)
(type solid)
)
(fill
(color 0 0 0 0.0000)
)
(uuid "a2e4406d-77db-4c93-91c7-9c2044625396")
(property "Sheetname" "Test2"
(at 63.5 83.1084 0)
(effects
(font
(size 1.27 1.27)
)
(justify left bottom)
)
)
(property "Sheetfile" "Test.kicad_sch"
(at 63.5 97.1046 0)
(effects
(font
(size 1.27 1.27)
)
(justify left top)
)
)
(instances
(project "issue21184"
(path "/498bac11-840c-4b9c-8c40-95416b6d764e"
(page "3")
)
)
)
)
(sheet_instances
(path "/"
(page "1")
)
)
(embedded_fonts no)
)
qa/tests/pcbnew/test_multichannel.cpp
+92
View File
@@ -331,4 +331,96 @@ BOOST_FIXTURE_TEST_CASE( RepeatLayoutCopiesFootprintProperties, MULTICHANNEL_TES
}
/**
* Test that repeat layout does not remove vias from the reference area when a copper zone
* has the same name as one of the rule areas (issue 21184).
*
* The bug occurred because enclosedByArea() matched zones by name, and when a copper fill zone
* shared a name with a rule area, items enclosed by either zone could be incorrectly affected.
*/
BOOST_FIXTURE_TEST_CASE( RepeatLayoutDoesNotRemoveReferenceVias, MULTICHANNEL_TEST_FIXTURE )
{
KI_TEST::LoadBoard( m_settingsManager, "issue21184/issue21184", m_board );
TOOL_MANAGER toolMgr;
MOCK_TOOLS_HOLDER* toolsHolder = new MOCK_TOOLS_HOLDER;
toolMgr.SetEnvironment( m_board.get(), nullptr, nullptr, nullptr, toolsHolder );
MULTICHANNEL_TOOL* mtTool = new MULTICHANNEL_TOOL;
toolMgr.RegisterTool( mtTool );
mtTool->FindExistingRuleAreas();
auto ruleData = mtTool->GetData();
BOOST_TEST_MESSAGE( wxString::Format( "Found %d rule areas",
static_cast<int>( ruleData->m_areas.size() ) ) );
BOOST_CHECK_EQUAL( ruleData->m_areas.size(), 2 );
if( ruleData->m_areas.size() < 2 )
return;
RULE_AREA* refArea = nullptr;
RULE_AREA* targetArea = nullptr;
for( RULE_AREA& ra : ruleData->m_areas )
{
if( ra.m_ruleName == wxT( "Test1" ) )
refArea = &ra;
else if( ra.m_ruleName == wxT( "Test2" ) )
targetArea = &ra;
}
BOOST_REQUIRE( refArea != nullptr );
BOOST_REQUIRE( targetArea != nullptr );
int refViaCountBefore = 0;
for( PCB_TRACK* track : m_board->Tracks() )
{
if( track->Type() == PCB_VIA_T )
{
PCB_VIA* via = static_cast<PCB_VIA*>( track );
VECTOR2I viaPos = via->GetPosition();
if( refArea->m_zone->Outline()->Contains( viaPos ) )
refViaCountBefore++;
}
}
BOOST_TEST_MESSAGE( wxString::Format( "Reference area vias before repeat: %d", refViaCountBefore ) );
BOOST_CHECK( refViaCountBefore > 0 );
mtTool->CheckRACompatibility( refArea->m_zone );
ruleData->m_compatMap[targetArea].m_doCopy = true;
ruleData->m_options.m_copyPlacement = true;
ruleData->m_options.m_copyRouting = true;
int result = mtTool->RepeatLayout( TOOL_EVENT(), refArea->m_zone );
BOOST_CHECK( result >= 0 );
int refViaCountAfter = 0;
for( PCB_TRACK* track : m_board->Tracks() )
{
if( track->Type() == PCB_VIA_T )
{
PCB_VIA* via = static_cast<PCB_VIA*>( track );
VECTOR2I viaPos = via->GetPosition();
if( refArea->m_zone->Outline()->Contains( viaPos ) )
refViaCountAfter++;
}
}
BOOST_TEST_MESSAGE( wxString::Format( "Reference area vias after repeat: %d", refViaCountAfter ) );
BOOST_CHECK_EQUAL( refViaCountAfter, refViaCountBefore );
}
BOOST_AUTO_TEST_SUITE_END()