Fix solder mask generation issues in STEP export
Fixed two problems with soldermask generation. First, via holes weren't
cut in soldermask when copper export was disabled. Second, we ignored
zones on F.Mask/B.Mask when zone export was disabled even though
soldermask export was enabled.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/20452
(cherry picked from commit 497fe12f2d)
This commit is contained in:
@@ -512,6 +512,17 @@ bool EXPORTER_STEP::buildTrack3DShape( PCB_TRACK* aTrack, VECTOR2D aOrigin )
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// m_poly_holes[B_SilkS].Append( holePoly );
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//}
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// Cut via holes in soldermask when the via is not tented.
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// This ensures the mask has a proper hole through the via drill, not just the annular ring opening.
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if( m_params.m_ExportSoldermask )
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{
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if( via->IsOnLayer( F_Mask ) )
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m_poly_holes[F_Mask].Append( holePoly );
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if( via->IsOnLayer( B_Mask ) )
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m_poly_holes[B_Mask].Append( holePoly );
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}
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m_pcbModel->AddHole( *holeShape, m_platingThickness, top_layer, bot_layer, true, aOrigin,
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!m_params.m_FillAllVias, m_params.m_CutViasInBody );
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@@ -533,12 +544,13 @@ bool EXPORTER_STEP::buildTrack3DShape( PCB_TRACK* aTrack, VECTOR2D aOrigin )
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}
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void EXPORTER_STEP::buildZones3DShape( VECTOR2D aOrigin )
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void EXPORTER_STEP::buildZones3DShape( VECTOR2D aOrigin, bool aSolderMaskOnly )
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{
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for( ZONE* zone : m_board->Zones() )
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{
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LSET layers = zone->GetLayerSet();
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// Filter by net if a net filter is specified and zone is on copper layer(s)
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if( ( layers & LSET::AllCuMask() ).count() && !m_params.m_NetFilter.IsEmpty()
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&& !zone->GetNetname().Matches( m_params.m_NetFilter ) )
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{
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@@ -547,6 +559,16 @@ void EXPORTER_STEP::buildZones3DShape( VECTOR2D aOrigin )
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for( PCB_LAYER_ID layer : layers.Seq() )
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{
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bool isMaskLayer = ( layer == F_Mask || layer == B_Mask );
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// If we're only processing soldermask zones, skip non-mask layers
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if( aSolderMaskOnly && !isMaskLayer )
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continue;
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// If we're doing full zone export, skip mask layers if they'll be handled separately
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if( !aSolderMaskOnly && isMaskLayer && !m_params.m_ExportZones )
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continue;
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SHAPE_POLY_SET fill_shape;
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zone->TransformSolidAreasShapesToPolygon( layer, fill_shape );
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fill_shape.Unfracture();
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@@ -779,6 +801,11 @@ bool EXPORTER_STEP::buildBoard3DShapes()
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buildZones3DShape( origin );
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}
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// Process zones on soldermask layers even when copper zone export is disabled.
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// This ensures mask openings defined by zones are properly exported.
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if( m_params.m_ExportSoldermask && !m_params.m_ExportZones )
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buildZones3DShape( origin, true );
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for( PCB_LAYER_ID pcblayer : m_layersToExport.Seq() )
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{
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SHAPE_POLY_SET holes = m_poly_holes[pcblayer];
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@@ -55,10 +55,10 @@ public:
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private:
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bool buildBoard3DShapes();
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bool buildFootprint3DShapes( FOOTPRINT* aFootprint, VECTOR2D aOrigin, SHAPE_POLY_SET* aClipPolygon );
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bool buildTrack3DShape( PCB_TRACK* aTrack, VECTOR2D aOrigin );
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void buildZones3DShape( VECTOR2D aOrigin );
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bool buildGraphic3DShape( BOARD_ITEM* aItem, VECTOR2D aOrigin );
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bool buildFootprint3DShapes( FOOTPRINT* aFootprint, const VECTOR2D& aOrigin, SHAPE_POLY_SET* aClipPolygon );
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bool buildTrack3DShape( PCB_TRACK* aTrack, const VECTOR2D& aOrigin );
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void buildZones3DShape( VECTOR2D aOrigin, bool aSolderMaskOnly = false );
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bool buildGraphic3DShape( BOARD_ITEM* aItem, const VECTOR2D& aOrigin );
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void initOutputVariant();
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EXPORTER_STEP_PARAMS m_params;
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