Translated using Weblate (Chinese (Simplified Han script))
Currently translated at 99.9% (9205 of 9206 strings) Translation: KiCad EDA/v8 Translate-URL: https://hosted.weblate.org/projects/kicad/v8/zh_Hans/
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@@ -36,8 +36,8 @@ msgstr ""
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"Project-Id-Version: KiCad_zh_CN_Master_v0.0.32\n"
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"Report-Msgid-Bugs-To: \n"
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"POT-Creation-Date: 2025-01-08 14:32+0300\n"
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"PO-Revision-Date: 2025-01-07 20:22+0000\n"
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"Last-Translator: CloverGit <w991593239@163.com>\n"
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"PO-Revision-Date: 2025-01-11 00:56+0000\n"
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"Last-Translator: dsa-t <dudesuchamazing@gmail.com>\n"
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"Language-Team: Chinese (Simplified Han script) <https://hosted.weblate.org/"
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"projects/kicad/v8/zh_Hans/>\n"
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"Language: zh_CN\n"
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@@ -748,7 +748,7 @@ msgstr "显示所有封装文本"
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#: 3d-viewer/dialogs/appearance_controls_3D.cpp:79
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msgid "Off-board Silkscreen"
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msgstr "板外丝印层"
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msgstr "板外丝印"
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#: 3d-viewer/dialogs/appearance_controls_3D.cpp:79
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msgid "Do not clip silk layers to board outline"
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@@ -5061,7 +5061,7 @@ msgstr "英寸 (Inches)"
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#: pcbnew/tools/drawing_tool.cpp:327 pcbnew/tools/edit_tool_move_fct.cpp:323
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#: pcbnew/tools/pcb_actions.cpp:1167
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msgid "Constrain to H, V, 45"
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msgstr "将绘制操作约束为水平方向, 垂直方向或斜 45 度方向"
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msgstr "将操作约束为水平、垂直或45度斜向"
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#: common/eda_draw_frame.cpp:406 common/tool/actions.cpp:702
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msgid "Edit Grids..."
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@@ -14504,9 +14504,9 @@ msgid ""
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"This may result in what appears to be duplicate field names but are actually "
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"unique names differing only by white space characters. Removing the white "
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"space characters will have no effect on existing symbol field names."
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msgstr ""
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"这可能会导致字段名称看起来重复, 但实际上它们是仅通过空白字符区分的唯一名称。"
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"移除空白字符不会影响现有符号字段名称。"
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msgstr "这可能会导致字段名称看起来重复, 但实际上它们是唯一的, "
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"仅仅是因为包含了空白字符的差异。去掉这些空白字符不会对现有的字段名称产生任何"
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"影响。"
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#: eeschema/dialogs/panel_template_fieldnames.cpp:217
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msgid "Remove White Space"
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@@ -20976,7 +20976,7 @@ msgstr "拖动所选项目"
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#: eeschema/tools/ee_actions.cpp:1363 eeschema/tools/sch_move_tool.cpp:1794
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msgid "Align Items to Grid"
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msgstr "将项目与栅格对齐"
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msgstr "将项目对齐到栅格"
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#: eeschema/tools/ee_actions.cpp:1371
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msgid "Save Current Sheet Copy As..."
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@@ -27849,7 +27849,7 @@ msgstr "板边倒角处理:"
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#: pcbnew/board_stackup_manager/panel_board_finish_base.cpp:44
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msgid "Yes, bevelled"
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msgstr "是"
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msgstr "是, 倒角斜边处理"
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#: pcbnew/board_stackup_manager/panel_board_finish_base.cpp:48
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msgid "Options for edge card connectors."
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@@ -28921,7 +28921,7 @@ msgstr "电路板名称"
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#: pcbnew/dialogs/dialog_board_statistics.cpp:689
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#: pcbnew/dialogs/dialog_board_statistics.cpp:697
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msgid "Area"
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msgstr "区"
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msgstr "面积"
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#: pcbnew/dialogs/dialog_board_statistics.cpp:744
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#: pcbnew/dialogs/dialog_board_statistics_base.cpp:39
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@@ -29204,7 +29204,7 @@ msgstr "域名称:"
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#: pcbnew/dialogs/dialog_copper_zones_base.cpp:97
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msgid "A unique name for this zone to identify it for DRC"
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msgstr "该域的唯一名称, 用于在 DRC 中对其进行标识"
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msgstr "为该域设置一个唯一的名称, 以便在 DRC 中对其进行标识"
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#: pcbnew/dialogs/dialog_copper_zones_base.cpp:104
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msgid "Zone priority level:"
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@@ -30640,9 +30640,8 @@ msgid "Do you want to cancel the export process?"
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msgstr "是否要取消导出过程?"
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#: pcbnew/dialogs/dialog_export_step_process.cpp:214
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#, fuzzy
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msgid "Cancel Export"
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msgstr "间距报告"
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msgstr "取消导出"
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#: pcbnew/dialogs/dialog_export_step_process.cpp:257
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msgid "Command line:\n"
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@@ -30717,7 +30716,7 @@ msgstr "水平镜像打印层"
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#: pcbnew/dialogs/dialog_export_svg_base.cpp:125
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#: pcbnew/dialogs/dialog_print_pcbnew.cpp:262
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msgid "Print one page per layer"
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msgstr "每层打印一页"
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msgstr "为每一层单独打印一页"
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#: pcbnew/dialogs/dialog_export_svg_base.cpp:134
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#: pcbnew/dialogs/dialog_print_pcbnew.cpp:268
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@@ -31144,8 +31143,8 @@ msgid ""
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"A negative value means a smaller stencil aperture size than pad size."
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msgstr ""
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"这是此封装的焊盘和锡膏之间的局部间距。\n"
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"此值可由焊盘局部值替代。\n"
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"最终的间距值是该值与间距值比率之和。\n"
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"该值可由焊盘中设置的局部值覆盖。\n"
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"最终间距值为该值与间距值比率之和。\n"
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"负值表示阻焊尺寸小于焊盘尺寸。"
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#: pcbnew/dialogs/dialog_footprint_properties_base.cpp:321
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@@ -32781,7 +32780,7 @@ msgstr "自定义 (基于矩形)"
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#: pcbnew/dialogs/dialog_pad_properties_base.cpp:114
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msgid "Trapezoid delta:"
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msgstr "梯形增量:"
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msgstr "Trapezoid delta:"
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#: pcbnew/dialogs/dialog_pad_properties_base.cpp:125
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msgid "Trapezoid axis:"
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@@ -33208,7 +33207,7 @@ msgstr "绘制封装文本"
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#: pcbnew/dialogs/dialog_plot_base.cpp:92
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msgid "Force plotting of invisible values / refs"
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msgstr "强制绘制隐藏的值或参考"
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msgstr "强制绘制隐藏的值或参考位号"
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#: pcbnew/dialogs/dialog_plot_base.cpp:93
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msgid "Force plot invisible footprint values and reference designators"
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@@ -33849,7 +33848,7 @@ msgstr "区名称:"
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#: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:54
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#: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:131
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msgid "A unique name for this rule area for use in DRC rules"
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msgstr "此规则区的唯一名称, 用于 DRC 规则"
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msgstr "为规则区设置一个唯一的名称, 以便在 DRC 规则中使用"
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#: pcbnew/dialogs/dialog_rule_area_properties_base.cpp:69
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msgid "Basic rules:"
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@@ -34318,7 +34317,7 @@ msgstr "从原理图更新 PCB"
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#: pcbnew/dialogs/panel_edit_options_base.cpp:29
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msgid "Constrain actions to H, V, 45 degrees"
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msgstr "将操作约束为水平方向, 垂直方向或斜 45 度方向"
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msgstr "将操作约束为水平、垂直或45度斜向"
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#: pcbnew/dialogs/panel_edit_options_base.cpp:35
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msgid "Step for &rotate commands:"
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@@ -36791,9 +36790,9 @@ msgid "Pad is not a through hole pad; connection will be: %s."
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msgstr "焊盘不是通孔焊盘; 连接将是: %s。"
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#: pcbnew/drc/drc_engine.cpp:784
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#, fuzzy, c-format
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#, c-format
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msgid "Net tie on %s; clearance: 0."
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msgstr "%s 上的局部覆盖; 间距: %s。"
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msgstr "%s 上的 Net tie; 间距: 0。"
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#: pcbnew/drc/drc_engine.cpp:787
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msgid "net tie"
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@@ -39883,7 +39882,7 @@ msgstr "%s 的非金属化焊盘"
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#: pcbnew/pad.cpp:1331
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#, c-format
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msgid "PTH pad %s of %s"
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msgstr "%s 的非金属化焊盘 %s"
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msgstr "%2$s 的金属化焊盘 %1$s"
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#: pcbnew/pad.cpp:1340
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#, c-format
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@@ -39898,7 +39897,7 @@ msgstr "%s 的 NPTH"
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#: pcbnew/pad.cpp:1352
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#, c-format
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msgid "PTH pad %s %s of %s"
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msgstr "%s 的非金属化焊盘 %s %s"
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msgstr "%3$s 的金属化焊盘 %1$s %2$s"
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#: pcbnew/pad.cpp:1898
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msgid "(Pad must have a positive size)"
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@@ -39929,7 +39928,7 @@ msgstr "(负局部间距值无效)"
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msgid ""
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"(negative solder mask clearance is larger than some shape primitives; "
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"results may be surprising)"
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msgstr "(负阻焊间距大于某些形状图元; 可能产生意料之外的结果)"
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msgstr "(负阻焊间距大于某些形状原型; 可能产生意料之外的结果)"
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#: pcbnew/pad.cpp:1982
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msgid ""
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@@ -41449,7 +41448,7 @@ msgstr "外框似乎不连续: 上一个点是 %s, 下一段的起点是 %s"
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#: pcbnew/pcb_io/fabmaster/import_fabmaster.cpp:3454
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#, c-format
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msgid "Invalid shape type %d in zone outline"
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msgstr "域轮廓中的形状类型 %d 无效"
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msgstr "域外框中的形状类型 %d 无效"
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#: pcbnew/pcb_io/fabmaster/pcb_io_fabmaster.cpp:69
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msgid "Could not read file "
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@@ -43283,7 +43282,7 @@ msgstr "已解析的线宽约束: 最小 %s; 最优 %s; 最大 %s。"
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#: pcbnew/tools/board_inspection_tool.cpp:1373
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msgid "Keepouts"
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msgstr "Keepouts"
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msgstr "Keepout 规则"
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#: pcbnew/tools/board_inspection_tool.cpp:1374
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msgid "Keepout resolution for:"
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