docs: Create comprehensive schematic wiring implementation plan
Created detailed 500+ line implementation plan for schematic wiring tools addressing user questions from Issue #26. ## Plan Overview **Phases:** 1. Core Wire Functionality (Week 1) - 26 hours - Research kicad-skip wire API - Fix wire creation - Implement pin discovery - Fix add_schematic_connection 2. Net Labels & Named Nets (Week 1-2) - 28 hours - Net label creation - connect_to_net implementation - Net connection discovery - Power symbol support 3. Advanced Features (Week 2-3) - 28 hours - Junction support - No-connect flags - Orthogonal routing - Bus and hierarchical labels 4. Validation & Polish (Week 3-4) - 28 hours - ERC integration - Comprehensive testing - Error handling - Documentation **Total Timeline:** 5 weeks (110 hours) **Accelerated:** 2-3 weeks (core features only) ## Technical Approach **Option A:** Use kicad-skip native API (preferred) **Option B:** S-expression manipulation (fallback, like dynamic loading) **Recommended:** Hybrid approach ## Key Challenges Identified 1. kicad-skip wire API uncertainty - needs research 2. Pin location calculation with rotation 3. Smart wire routing (orthogonal preferred) 4. Net label attachment to wires ## Current State - ConnectionManager class exists with methods - MCP handlers registered (6 tools) - Basic implementation present but untested - User reported add_schematic_wire fails ## Next Steps 1. Research kicad-skip wire API (TODAY) 2. Create test environment (TOMORROW) 3. Implement basic wire (THIS WEEK) 4. Fix pin discovery (THIS WEEK) Co-Authored-By: Claude Sonnet 4.5 <noreply@anthropic.com>
This commit is contained in:
KiCAD MCP Bot
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# Schematic Wiring Implementation Plan
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**Date:** 2026-01-10
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**Status:** Planning Phase
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**Priority:** HIGH (User-requested feature for Issue #26)
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---
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## Executive Summary
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This plan outlines the implementation of complete schematic wiring functionality for the KiCAD MCP Server. Currently, component placement works perfectly with dynamic symbol loading, but wire/connection tools are incomplete or non-functional.
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**Goal:** Enable users to create complete, functional schematics with wired connections between components through the MCP interface.
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---
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## Current State Analysis
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### What Exists ✅
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**Files:**
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- `python/commands/connection_schematic.py` - ConnectionManager class with wire/label methods
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- MCP handlers in `kicad_interface.py` for 6 connection-related tools
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**MCP Tools (Registered):**
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1. `add_schematic_wire` - Add wire between two points
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2. `add_schematic_connection` - Connect two component pins
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3. `add_schematic_net_label` - Add net label
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4. `connect_to_net` - Connect pin to named net
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5. `get_net_connections` - Query net connections
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6. `generate_netlist` - Generate netlist from schematic
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**ConnectionManager Methods:**
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- `add_wire(schematic, start_point, end_point)` - Add wire between coordinates
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- `add_connection(schematic, source_ref, source_pin, target_ref, target_pin)` - Connect pins
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- `add_net_label(schematic, net_name, position)` - Add label
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- `connect_to_net(schematic, component_ref, pin_name, net_name)` - Pin to net
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- `get_pin_location(symbol, pin_name)` - Get pin coordinates
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- `get_net_connections(schematic, net_name)` - Query connections
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- `generate_netlist(schematic)` - Generate netlist
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### What's Broken/Missing ❌
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**Problem 1: kicad-skip API Uncertainty**
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- Code assumes `schematic.wire.append()` exists
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- Code assumes `schematic.label.append()` exists
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- Code assumes pins have `.name` and `.location` attributes
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- **Need to verify what kicad-skip actually supports**
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**Problem 2: Pin Location Calculation**
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- Current implementation tries to calculate absolute pin positions
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- May not account for symbol rotation
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- May not work with multi-unit symbols
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- Pin numbering vs pin naming confusion
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**Problem 3: No Visual Feedback**
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- No way to verify wires were created correctly
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- No validation of wire endpoints
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- No checks for overlapping wires or junctions
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**Problem 4: Limited Testing**
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- No integration tests for wiring functionality
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- No validation with real KiCad schematics
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- User reported `add_schematic_wire` fails
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**Problem 5: Missing Features**
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- No junction (wire intersection) support
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- No bus support (multi-bit signals)
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- No no-connect flags
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- No power symbols (VCC, GND graphical symbols)
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- No hierarchical labels
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---
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## Technical Challenges
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### Challenge 1: kicad-skip Wire API
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**Issue:** The kicad-skip library documentation is sparse. We need to determine:
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- Does `schematic.wire` exist?
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- What's the correct API to add wires?
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- How are wires stored in .kicad_sch files?
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**S-Expression Format (KiCad 8/9):**
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```lisp
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(wire (pts (xy 100 100) (xy 200 100))
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(stroke (width 0) (type default))
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(uuid "12345678-1234-1234-1234-123456789012")
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)
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```
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**Approach:**
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1. Examine kicad-skip source code
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2. Test wire creation manually with kicad-skip
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3. Fall back to S-expression manipulation if necessary (similar to dynamic symbol loading)
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### Challenge 2: Pin Location Discovery
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**Issue:** Need to find exact pin coordinates for automatic wiring.
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**Pin Data in Symbols:**
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Pins are defined within symbol definitions in lib_symbols, with coordinates relative to symbol origin. When symbol is placed, pins move with it.
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**Required Information:**
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- Symbol position (x, y)
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- Symbol rotation angle
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- Pin offset from symbol origin
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- Pin number/name mapping
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**Solution:**
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1. Parse symbol definition to find pin definitions
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2. Apply transformation matrix (position + rotation) to pin coordinates
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3. Return absolute pin position in schematic space
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### Challenge 3: Smart Wire Routing
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**Issue:** Users don't want to manually specify every wire segment.
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**Desired Behavior:**
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```
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User: "Connect R1 pin 1 to C1 pin 1"
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System:
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- Calculate R1 pin 1 location: (100, 100)
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- Calculate C1 pin 1 location: (150, 120)
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- Create wire path (orthogonal routing preferred):
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- (100, 100) → (100, 120) → (150, 120)
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- Or simple direct: (100, 100) → (150, 120)
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```
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**Auto-Routing Options:**
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1. **Direct** - Single wire segment (diagonal if needed)
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2. **Orthogonal** - Only horizontal/vertical segments (2 segments)
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3. **Manhattan** - Complex path avoiding components (3+ segments)
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**Phase 1 Approach:** Start with direct wiring, add orthogonal later.
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### Challenge 4: Net Label Integration
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**Issue:** Labels need to attach to wires, not float in space.
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**KiCad Behavior:**
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- Labels must touch a wire or pin
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- Labels create electrical connections at their attachment point
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- Multiple labels with same name = connected net
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**Implementation:**
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- When adding label, find nearest wire endpoint
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- Attach label to that coordinate
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- Or create short wire stub for label attachment
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---
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## Implementation Phases
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### Phase 1: Core Wire Functionality (Week 1)
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**Goal:** Get basic wiring working with kicad-skip API
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**Tasks:**
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1. **Research kicad-skip Wire API** (4 hours)
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- Read kicad-skip source code
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- Test wire creation with Python REPL
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- Document actual API methods
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- Create test schematic with manual wires
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2. **Fix Wire Creation** (6 hours)
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- Update ConnectionManager.add_wire() with correct API
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- Handle S-expression manipulation if needed
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- Add UUID generation for wires
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- Test with simple wire (100,100) → (200,100)
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3. **Implement Pin Discovery** (8 hours)
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- Parse symbol definitions to extract pin data
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- Handle pin coordinates relative to symbol
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- Apply rotation transformation
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- Test with R, C, LED from dynamic symbols
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4. **Fix add_schematic_connection** (4 hours)
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- Use correct pin discovery
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- Create direct wire between pins
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- Handle error cases (pin not found, etc.)
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- Test with R1 pin 2 → C1 pin 1
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5. **Integration Testing** (4 hours)
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- Create test schematic with R, C, LED
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- Wire R to C
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- Wire C to LED
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- Verify schematic opens in KiCad
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- Verify electrical connectivity
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**Deliverables:**
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- Working `add_schematic_wire` tool
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- Working `add_schematic_connection` tool
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- Pin location discovery working
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- Integration test passing
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- Documentation updated
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**Success Criteria:**
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- User can connect two resistor pins with MCP command
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- Wire appears in KiCad schematic viewer
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- Netlist shows electrical connection
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---
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### Phase 2: Net Labels & Named Nets (Week 1-2)
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**Goal:** Enable named net connections (VCC, GND, etc.)
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**Tasks:**
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1. **Fix Net Label Creation** (4 hours)
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- Update ConnectionManager.add_net_label()
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- Use correct kicad-skip API or S-expression
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- Position labels correctly
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- Test label creation
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2. **Implement connect_to_net** (6 hours)
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- Create wire stub from pin
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- Attach label to wire endpoint
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- Support common nets (VCC, GND, 3V3, etc.)
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- Test with multiple components on same net
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3. **Net Connection Discovery** (6 hours)
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- Parse wires and labels in schematic
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- Build connectivity graph
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- Implement get_net_connections()
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- Return all pins on a net
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4. **Power Symbol Support** (8 hours)
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- Add power symbols to templates (VCC, GND, 3V3, 5V)
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- Or dynamically load from power library
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- Connect power pins to power nets
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- Test complete circuit with power
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5. **Testing** (4 hours)
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- Create circuit with VCC, GND nets
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- Connect multiple components to each net
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- Verify net connectivity
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- Generate and validate netlist
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**Deliverables:**
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- Working `add_schematic_net_label` tool
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- Working `connect_to_net` tool
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- Working `get_net_connections` tool
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- Power symbol support
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- Netlist generation working
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**Success Criteria:**
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- User can label nets VCC, GND
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- Multiple components connect to same net
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- Netlist correctly shows net membership
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---
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### Phase 3: Advanced Features (Week 2-3)
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**Goal:** Professional schematic features
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**Tasks:**
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1. **Junction Support** (4 hours)
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- Detect wire intersections
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- Add junction dots at T-junctions
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- S-expression: `(junction (at x y) (diameter 0) (uuid ...))`
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2. **No-Connect Flags** (2 hours)
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- Add "X" marks on unused pins
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- S-expression: `(no_connect (at x y) (uuid ...))`
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3. **Orthogonal Routing** (6 hours)
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- Implement 2-segment wire routing
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- Horizontal-then-vertical or vertical-then-horizontal
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- Choose best path based on pin positions
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4. **Bus Support** (8 hours)
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- Multi-bit signal buses
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- Bus labels (e.g., "D[0..7]")
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- Bus entries for individual signals
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5. **Hierarchical Labels** (8 hours)
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- Labels for hierarchical sheets
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- Input/Output/Bidirectional types
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- Sheet connections
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**Deliverables:**
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- Junction creation
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- No-connect support
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- Smart orthogonal routing
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- Bus and hierarchical label support
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**Success Criteria:**
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- Wires route cleanly around components
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- Junctions appear at wire intersections
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- Unused pins marked with no-connect
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---
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### Phase 4: Validation & Polish (Week 3-4)
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**Goal:** Production-ready reliability
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**Tasks:**
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1. **ERC Integration** (6 hours)
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- Electrical Rule Check
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- Detect floating nets
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- Detect unconnected pins
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- Detect short circuits
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2. **Visual Validation** (4 hours)
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- Export schematic to PDF after wiring
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- Verify wire appearance
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- Check net label placement
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3. **Comprehensive Testing** (8 hours)
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- Test with Device library components
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- Test with IC components (multi-pin)
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- Test with connectors
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- Test complex circuits (10+ components)
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4. **Error Handling** (4 hours)
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- Graceful failures
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- Clear error messages
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- Validation of coordinates
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- Duplicate net label detection
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5. **Documentation** (6 hours)
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- Update MCP tool descriptions
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- Add usage examples to README
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- Create wiring tutorial
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- Add to CHANGELOG
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**Deliverables:**
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- ERC validation
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- Comprehensive test suite
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- Error handling
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- Complete documentation
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**Success Criteria:**
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- 95%+ test pass rate
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- Users can create functional circuits
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- Clear error messages on failures
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---
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## Technical Approach
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### Option A: Use kicad-skip Native API (Preferred)
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**If kicad-skip supports wires natively:**
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```python
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# Add wire using native API
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wire = schematic.wire.new(
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start=[100, 100],
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end=[200, 100]
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)
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# Add label
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label = schematic.label.new(
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text="VCC",
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at=[150, 100]
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)
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```
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**Pros:**
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- Clean, maintainable code
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- Follows library patterns
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- Less likely to break
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**Cons:**
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- Depends on kicad-skip having these features
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- May be limited in functionality
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### Option B: S-Expression Manipulation (Fallback)
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**If kicad-skip doesn't support wires:**
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Use the same approach as dynamic symbol loading:
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```python
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import sexpdata
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from sexpdata import Symbol
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# Read schematic
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with open(schematic_path, 'r') as f:
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sch_data = sexpdata.loads(f.read())
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# Create wire S-expression
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wire_sexp = [
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Symbol('wire'),
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[Symbol('pts'),
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[Symbol('xy'), 100, 100],
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[Symbol('xy'), 200, 100]
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],
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[Symbol('stroke'), [Symbol('width'), 0], [Symbol('type'), Symbol('default')]],
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[Symbol('uuid'), str(uuid.uuid4())]
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]
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# Insert into schematic
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sch_data.append(wire_sexp)
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# Write back
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with open(schematic_path, 'w') as f:
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f.write(sexpdata.dumps(sch_data))
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```
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**Pros:**
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- Complete control
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- Can implement any feature
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- Works around library limitations
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**Cons:**
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- More complex
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- Requires deep KiCad format knowledge
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- More maintenance
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### Hybrid Approach (Recommended)
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1. Try kicad-skip native API first
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2. Fall back to S-expression if needed
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3. Use S-expression for advanced features (junctions, buses)
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---
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## Pin Discovery Algorithm
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### Step 1: Get Symbol Definition
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Symbols are stored in `lib_symbols` section:
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```lisp
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(lib_symbols
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(symbol "Device:R"
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(symbol "R_0_1"
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(rectangle (start -1 -2.54) (end 1 2.54) ...))
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(symbol "R_1_1"
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(pin passive line (at 0 3.81 270) (length 1.27)
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(name "~" (effects (font (size 1.27 1.27))))
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(number "1" (effects (font (size 1.27 1.27)))))
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(pin passive line (at 0 -3.81 90) (length 1.27)
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(name "~" (effects (font (size 1.27 1.27))))
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(number "2" (effects (font (size 1.27 1.27)))))))
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```
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### Step 2: Extract Pin Information
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For each pin:
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- Number (e.g., "1", "2")
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- Name (e.g., "GND", "VCC", "~" for unnamed)
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- Position relative to symbol origin: `(at x y angle)`
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- Length (distance from symbol body to connection point)
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### Step 3: Get Symbol Instance Position
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From symbol instance in schematic:
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```lisp
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(symbol (lib_id "Device:R") (at 100 100 0) (unit 1)
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(property "Reference" "R1" ...))
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```
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Extract:
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- Position: `(at 100 100 0)` = x=100, y=100, rotation=0°
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- Reference: "R1"
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### Step 4: Calculate Absolute Pin Position
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```python
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def get_absolute_pin_position(symbol_instance, pin_definition):
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# Symbol position
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symbol_x, symbol_y, symbol_rotation = symbol_instance.at.value
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# Pin position relative to symbol
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pin_x, pin_y, pin_angle = pin_definition.at.value
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# Apply rotation transformation
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if symbol_rotation != 0:
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# Rotate pin coordinates around origin
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rad = math.radians(symbol_rotation)
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rotated_x = pin_x * math.cos(rad) - pin_y * math.sin(rad)
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rotated_y = pin_x * math.sin(rad) + pin_y * math.cos(rad)
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pin_x, pin_y = rotated_x, rotated_y
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# Translate to absolute position
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abs_x = symbol_x + pin_x
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abs_y = symbol_y + pin_y
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return [abs_x, abs_y]
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```
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---
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## Wire Routing Strategies
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### Strategy 1: Direct Wire (Phase 1)
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Simplest: single wire segment from pin A to pin B.
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|
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```
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R1 pin 2 C1 pin 1
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o-------------o
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```
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**Pros:** Simple, fast
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**Cons:** Diagonal wires (not standard practice)
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||||
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### Strategy 2: Orthogonal 2-Segment (Phase 3)
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||||
Two segments: horizontal then vertical, or vertical then horizontal.
|
||||
|
||||
```
|
||||
R1 pin 2 C1 pin 1
|
||||
o-----┐
|
||||
│
|
||||
└------o
|
||||
```
|
||||
|
||||
**Algorithm:**
|
||||
1. Calculate midpoint
|
||||
2. Route horizontal to midpoint
|
||||
3. Route vertical to target
|
||||
4. Or vice versa based on direction
|
||||
|
||||
**Pros:** Standard practice, cleaner schematics
|
||||
**Cons:** Slightly more complex
|
||||
|
||||
### Strategy 3: Manhattan Routing (Future)
|
||||
|
||||
Complex multi-segment paths avoiding components.
|
||||
|
||||
**Pros:** Professional appearance
|
||||
**Cons:** Requires collision detection, path planning
|
||||
|
||||
---
|
||||
|
||||
## Testing Strategy
|
||||
|
||||
### Unit Tests
|
||||
|
||||
Test individual functions:
|
||||
- `test_add_wire()` - Wire creation
|
||||
- `test_get_pin_location()` - Pin discovery
|
||||
- `test_add_net_label()` - Label creation
|
||||
- `test_calculate_pin_position()` - Coordinate math
|
||||
|
||||
### Integration Tests
|
||||
|
||||
Test complete workflows:
|
||||
- `test_connect_two_resistors()` - Wire R1 to R2
|
||||
- `test_connect_to_vcc_net()` - Multiple components to VCC
|
||||
- `test_generate_netlist()` - Netlist accuracy
|
||||
- `test_schematic_opens_in_kicad()` - File validity
|
||||
|
||||
### Manual Validation
|
||||
|
||||
- Create test schematic in KiCad manually
|
||||
- Add same connections via MCP
|
||||
- Compare results
|
||||
- Verify electrical connectivity in KiCad
|
||||
|
||||
---
|
||||
|
||||
## Success Metrics
|
||||
|
||||
### Phase 1 Success:
|
||||
- [ ] `add_schematic_wire` works (coordinates)
|
||||
- [ ] `add_schematic_connection` works (pin to pin)
|
||||
- [ ] Wires appear in KiCad schematic
|
||||
- [ ] Netlist shows connections
|
||||
- [ ] 3+ integration tests passing
|
||||
|
||||
### Phase 2 Success:
|
||||
- [ ] Net labels work (VCC, GND, etc.)
|
||||
- [ ] Multiple components on same net
|
||||
- [ ] `get_net_connections` returns correct results
|
||||
- [ ] Netlist includes named nets
|
||||
- [ ] 5+ integration tests passing
|
||||
|
||||
### Phase 3 Success:
|
||||
- [ ] Junctions at wire intersections
|
||||
- [ ] Orthogonal routing preferred
|
||||
- [ ] No-connect flags on unused pins
|
||||
- [ ] 10+ integration tests passing
|
||||
|
||||
### Phase 4 Success:
|
||||
- [ ] ERC detects errors
|
||||
- [ ] 95%+ test coverage
|
||||
- [ ] Complete documentation
|
||||
- [ ] User can create functional circuits without errors
|
||||
|
||||
---
|
||||
|
||||
## Risk Assessment
|
||||
|
||||
| Risk | Probability | Impact | Mitigation |
|
||||
|------|------------|--------|------------|
|
||||
| kicad-skip lacks wire API | High | High | Use S-expression fallback |
|
||||
| Pin discovery complex | Medium | Medium | Test with multiple symbol types |
|
||||
| Rotation math errors | Medium | High | Extensive testing, validation |
|
||||
| Performance issues | Low | Medium | Optimize S-expression parsing |
|
||||
| KiCad format changes | Low | High | Version detection, compatibility |
|
||||
|
||||
---
|
||||
|
||||
## Dependencies
|
||||
|
||||
**Required:**
|
||||
- kicad-skip >= 0.1.0 (or compatible)
|
||||
- sexpdata (already dependency for dynamic loading)
|
||||
- Python 3.8+
|
||||
|
||||
**Optional:**
|
||||
- KiCad CLI for validation (`kicad-cli sch export netlist`)
|
||||
|
||||
---
|
||||
|
||||
## Timeline Estimate
|
||||
|
||||
**Phase 1:** 1 week (26 hours)
|
||||
**Phase 2:** 1 week (28 hours)
|
||||
**Phase 3:** 1.5 weeks (28 hours)
|
||||
**Phase 4:** 1.5 weeks (28 hours)
|
||||
|
||||
**Total:** 5 weeks (110 hours)
|
||||
|
||||
**Accelerated path (core features only):** 2-3 weeks (Phases 1-2)
|
||||
|
||||
---
|
||||
|
||||
## Next Immediate Steps
|
||||
|
||||
1. **Research kicad-skip Wire API** (TODAY)
|
||||
- Test with Python REPL
|
||||
- Document findings
|
||||
- Choose implementation approach
|
||||
|
||||
2. **Create Test Environment** (TOMORROW)
|
||||
- Set up test schematic
|
||||
- Manual wire creation in KiCad
|
||||
- Export for comparison
|
||||
|
||||
3. **Implement Basic Wire** (THIS WEEK)
|
||||
- Update ConnectionManager.add_wire()
|
||||
- Test with simple coordinates
|
||||
- Verify in KiCad
|
||||
|
||||
4. **Fix Pin Discovery** (THIS WEEK)
|
||||
- Parse symbol definitions
|
||||
- Calculate absolute positions
|
||||
- Test with rotated symbols
|
||||
|
||||
---
|
||||
|
||||
## User Communication
|
||||
|
||||
**For Issue #26:**
|
||||
|
||||
Update users that:
|
||||
- ✅ Component placement is DONE (with 10,000+ symbols)
|
||||
- ⏳ Wire/connection tools are IN PROGRESS
|
||||
- 📅 Estimated completion: 2-3 weeks for core functionality
|
||||
- 🎯 Goal: Complete functional schematics with wiring
|
||||
|
||||
---
|
||||
|
||||
**Status:** Ready for implementation
|
||||
**Owner:** TBD
|
||||
**Priority:** HIGH (user-blocking feature)
|
||||
Reference in New Issue
Block a user