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This commit is contained in:
Clément SAILLANT
2023-09-15 11:32:02 +02:00
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.DS_Store
.pio
.vscode/.browse.c_cpp.db*
.vscode/c_cpp_properties.json
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(module IC_STM32F042G6U6TR (layer F.Cu) (tedit 62F3A369)
(descr "<b>UFQFPN28</b><br>")
(fp_text reference REF** (at 0.675 -3.385 0) (layer F.SilkS)
(effects (font (size 1.0 1.0) (thickness 0.15)))
)
(fp_text value IC_STM32F042G6U6TR (at 8.93 3.385 0) (layer F.Fab)
(effects (font (size 1.0 1.0) (thickness 0.15)))
)
(pad 1 smd custom (at -1.9 -1.5) (size 0.1 0.1) (layers F.Cu)
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(pad 2 smd rect (at -1.875 -1.0) (size 0.55 0.3) (layers F.Cu F.Mask F.Paste))
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(fp_line (start -2.0 -2.0) (end 2.0 -2.0) (layer F.Fab) (width 0.127))
(fp_line (start 2.0 -2.0) (end 2.0 2.0) (layer F.Fab) (width 0.127))
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(fp_line (start -2.4 -2.4) (end 2.4 -2.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.4 -2.4) (end 2.4 2.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.4 2.4) (end -2.4 2.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.4 2.4) (end -2.4 -2.4) (layer F.CrtYd) (width 0.05))
(fp_circle (center -2.75 -1.5) (end -2.65 -1.5) (layer F.SilkS) (width 0.2))
(fp_circle (center -2.75 -1.5) (end -2.65 -1.5) (layer F.Fab) (width 0.2))
)
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BY ACCESSING OR USING THESE SYMBOLS & FOOTPRINTS ("MODELS"), YOU ARE ACKNOWLEDGING THAT YOU HAVE READ, FULLY UNDERSTAND AND AGREE TO THESE TERMS AND CONDITIONS (the "Agreement"), WHICH CONSTITUTE A BINDING AGREEMENT BETWEEN YOU AND SNAPEDA, INC., ENTERED INTO ON THE DATE OF SUCH OCCURRENCE (the "Effective Date"). IF YOU ARE ACCESSING OR USING THESE FILES ON BEHALF OF AN ENTITY, YOU REPRESENT THAT YOU HAVE THE RIGHT, AUTHORITY, AND CAPACITY TO BIND SUCH ENTITY TO THIS AGREEMENT AND HEREBY DO SO. IF YOU DO NOT AGREE WITH ANY OF THE TERMS OR CONDITIONS OF THIS AGREEMENT, YOU MUST NOT USE ANY PART OF THESE MODELS.
1. Design License
You and your sub-licensees are hereby licensed to design, manufacture, use and distribute, circuit board designs and circuit boards formed by combining Models provided by SnapEDA with other circuit elements of your choosing. You may then convey such combinations under licensing terms of your choice. 
Individual Models remain the intellectual property of SnapEDA, Inc. You shall not (and shall not permit or encourage any third party to) to do any of the following :
(a) sell, assign, lease, lend, rent, issue, sublicense, make available, or otherwise distribute to any third party, or publicly perform, display or communicate, the Models (for example, by uploading Models to another website or software application);
(b) remove, alter, or conceal, any copyright, trademark, or other proprietary rights notice or legend displayed or contained in the individual Models.
For further clarity, once integrated into a schematic design or PCB layout, Models may be modified freely for the purpose of designing a circuit board. 
2. Limitation of Liability
IN NO EVENT WILL SNAPEDA OR OUR SUBSIDIARIES, AGENTS, SUCCESSORS, THIRD PARTY PROVIDERS, AND/OR ANY OF THE FOREGOING ENTITIES' RESPECTIVE DIRECTORS, OFFICERS, EMPLOYEES, AGENTS, REPRESENTATIVES, CUSTOMERS, SUPPLIERS, OR LICENSORS BE RESPONSIBLE OR LIABLE UNDER, OR OTHERWISE IN CONNECTION WITH THIS AGREEMENT, FOR:
(a) ANY CONSEQUENTIAL, INDIRECT, SPECIAL, INCIDENTAL, OR PUNITIVE DAMAGES;
(b) ANY LOSS OF PROFITS, LOSS OF BUSINESS, LOSS OF REVENUE, OR LOSS OF ANTICIPATED SAVINGS;
(c) ANY LOSS OF, OR DAMAGE TO, DATA, REPUTATION, OR GOODWILL; AND/OR
(d) THE COST OF PROCURING ANY SUBSTITUTE GOODS OR SERVICES.
THE COMBINED AGGREGATE LIABILITY OF SNAPEDA AND ALL SNAPEDA CONTENT AFFILIATES UNDER, OR OTHERWISE IN CONNECTION WITH, THIS AGREEMENT SHALL NOT EXCEED THE TOTAL AMOUNT OF FEES RECEIVED BY SNAPEDA FROM YOU IN THE PREVIOUS TWELVE (12) MONTHS. THE FOREGOING EXCLUSIONS AND LIMITATIONS SHALL APPLY: (a) EVEN IF SNAPEDA OR ANY SNAPEDA CONTENT AFFILIATE HAS BEEN ADVISED, OR SHOULD HAVE BEEN AWARE, OF THE POSSIBILITY OF LOSSES, DAMAGES, OR COSTS; (b) EVEN IF ANY REMEDY IN THIS AGREEMENT FAILS OF ITS ESSENTIAL PURPOSE; AND (c) REGARDLESS OF THE THEORY OR BASIS OF LIABILITY (INCLUDING WITHOUT LIMITATION BREACH OF CONTRACT, TORT, NEGLIGENCE, AND STRICT LIABILITY).
-53
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# STM32G031G8U6
#
DEF STM32G031G8U6 U 0 40 N Y 1 L N
F0 "U" -700 750 50 H V L BNN
F1 "STM32G031G8U6" -700 -1050 50 H V L BNN
F2 "IC_STM32F042G6U6TR" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "In Stock" 0 0 50 H I L BNN "AVAILABILITY"
F5 "https://pricing.snapeda.com/search/part/STM32F042G6U6TR/?ref=eda" 0 0 50 H I L BNN "PURCHASE-URL"
F6 "STM32F042G6U6TR" 0 0 50 H I L BNN "MP"
F7 "ARM® Cortex®-M0 STM32F0 Microcontroller IC 32-Bit 48MHz 32KB (32K x 8) FLASH 28-UFQFPN (4x4)" 0 0 50 H I L BNN "DESCRIPTION"
F8 "None" 0 0 50 H I L BNN "PRICE"
F9 "UFQFN-28 STMicroelectronics" 0 0 50 H I L BNN "PACKAGE"
F10 "STMicroelectronics" 0 0 50 H I L BNN "MF"
DRAW
S -700 -1000 700 700 0 0 10 f
X PB8 28 800 -300 100 L 40 40 0 0 B
X PC14/OSC32_IN 1 800 -600 100 L 40 40 0 0 B
X PC15/OSC32_OUT 2 800 -700 100 L 40 40 0 0 B
X NRST/PF2 5 -800 600 100 R 40 40 0 0 B
X PA0 6 -800 400 100 R 40 40 0 0 B
X PA1 7 -800 300 100 R 40 40 0 0 B
X PA2 8 -800 200 100 R 40 40 0 0 B
X PA3 9 -800 100 100 R 40 40 0 0 B
X PA4 10 -800 0 100 R 40 40 0 0 B
X PA5 11 -800 -100 100 R 40 40 0 0 B
X PA6 12 -800 -200 100 R 40 40 0 0 B
X PA7 13 -800 -300 100 R 40 40 0 0 B
X PB1 15 800 300 100 L 40 40 0 0 B
X VSS/VSSA 4 800 -900 100 L 40 40 0 0 W
X VDD/VDDA 3 800 600 100 L 40 40 0 0 W
X PA9[PA11] 18 -800 -500 100 R 40 40 0 0 B
X PA10[PA12] 19 -800 -600 100 R 40 40 0 0 B
X PA13 20 -800 -700 100 R 40 40 0 0 B
X PA14/BOOT0 21 -800 -800 100 R 40 40 0 0 B
X PB0 14 800 400 100 L 40 40 0 0 B
X PA15 22 -800 -900 100 R 40 40 0 0 B
X PB3 23 800 200 100 L 40 40 0 0 B
X PB4 24 800 100 100 L 40 40 0 0 B
X PB5 25 800 0 100 L 40 40 0 0 B
X PB6 26 800 -100 100 L 40 40 0 0 B
X PB7 27 800 -200 100 L 40 40 0 0 B
X PA8 16 -800 -400 100 R 40 40 0 0 B
X PC6 17 800 -400 100 L 40 40 0 0 B
ENDDRAW
ENDDEF
#
# End Library
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