e1a116d0f5
Custom ESP32-WROOM-32E + Si3210 SLIC board replacing the ESP32-A1S dev kit (final PLIP target, RJ9 handset). Generated via tools/ gen_si3210_lib.py (symbol + QFN-38 footprint), gen_schematic.py (parses standard KiCad libs, 45 instances, 157 global labels on pin ends) and gen_pcb.py (58x38mm outline, 41 footprints placed per the plan, nets assigned, unrouted). ERC: 0 violations. Schematic follows the spec GPIO map and the plan's passive network. PCB placed not routed (Freerouting + DRC + gerbers remain — see README). BOM in JLCPCB format; CP2102N/transformer/RJ9 LCSC parts marked TBD. WARNINGS (README): the Si3210 -72V DC-DC stage is simplified and must be checked against the Skyworks datasheet/AN35 before fab; line protection is minimal; human review required before ordering.
4 lines
24 B
Plaintext
4 lines
24 B
Plaintext
*.lck
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*-bak
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_autosave-*
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