diff --git a/common/lset.cpp b/common/lset.cpp index 1e00b5f23e..70f5e66bfb 100644 --- a/common/lset.cpp +++ b/common/lset.cpp @@ -879,14 +879,7 @@ LSET LSET::BackMask() LSET LSET::ForbiddenFootprintLayers() { - static const LSET saved = InternalCuMask().set( Margin ); - return saved; -} - - -LSET LSET::ForbiddenTextLayers() -{ - static const LSET saved( 1, Edge_Cuts ); + static const LSET saved = InternalCuMask(); return saved; } diff --git a/include/layers_id_colors_and_visibility.h b/include/layers_id_colors_and_visibility.h index 07e893c927..c6692a102e 100644 --- a/include/layers_id_colors_and_visibility.h +++ b/include/layers_id_colors_and_visibility.h @@ -657,11 +657,6 @@ public: static LSET ForbiddenFootprintLayers(); - /** - * Layers which are allowed to have text on them. Currently Edge.Cuts and Margin. - */ - static LSET ForbiddenTextLayers(); - /** * Return a sequence of copper layers in starting from the front/top * and extending to the back/bottom. This specific sequence is depended upon diff --git a/pcbnew/class_board.cpp b/pcbnew/class_board.cpp index 1ad87afb45..7498a97937 100644 --- a/pcbnew/class_board.cpp +++ b/pcbnew/class_board.cpp @@ -996,10 +996,10 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const bool showInvisibleText = IsElementVisible( LAYER_MOD_TEXT_INVISIBLE ) && PgmOrNull() && !PgmOrNull()->m_Printing; - // Check segments, dimensions, texts, and fiducials + // Check shapes, dimensions, texts, and fiducials for( BOARD_ITEM* item : m_drawings ) { - if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts ) ) + if( aBoardEdgesOnly && ( item->GetLayer() != Edge_Cuts || item->Type() != PCB_SHAPE_T ) ) continue; if( ( item->GetLayerSet() & visible ).any() ) @@ -1016,7 +1016,7 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const { for( const BOARD_ITEM* edge : module->GraphicalItems() ) { - if( edge->GetLayer() == Edge_Cuts ) + if( edge->GetLayer() == Edge_Cuts && edge->Type() == PCB_FP_SHAPE_T ) area.Merge( edge->GetBoundingBox() ); } } diff --git a/pcbnew/dialogs/dialog_dimension_properties.cpp b/pcbnew/dialogs/dialog_dimension_properties.cpp index 44b7e460d0..721d9efb67 100644 --- a/pcbnew/dialogs/dialog_dimension_properties.cpp +++ b/pcbnew/dialogs/dialog_dimension_properties.cpp @@ -102,7 +102,6 @@ DIALOG_DIMENSION_PROPERTIES::DIALOG_DIMENSION_PROPERTIES( PCB_BASE_EDIT_FRAME* a m_cbLayerActual->ShowNonActivatedLayers( true ); m_cbLayerActual->SetLayersHotkeys( false ); - m_cbLayerActual->SetNotAllowedLayerSet( LSET::ForbiddenTextLayers() ); m_cbLayerActual->SetBoardFrame( aParent ); m_cbLayerActual->Resync(); diff --git a/pcbnew/dialogs/dialog_text_properties.cpp b/pcbnew/dialogs/dialog_text_properties.cpp index 997cbac99d..0eb168a1b1 100644 --- a/pcbnew/dialogs/dialog_text_properties.cpp +++ b/pcbnew/dialogs/dialog_text_properties.cpp @@ -110,7 +110,6 @@ DIALOG_TEXT_PROPERTIES::DIALOG_TEXT_PROPERTIES( PCB_BASE_EDIT_FRAME* aParent, BO m_LayerSelectionCtrl->ShowNonActivatedLayers( true ); m_LayerSelectionCtrl->SetLayersHotkeys( false ); - m_LayerSelectionCtrl->SetNotAllowedLayerSet( LSET::ForbiddenTextLayers() ); m_LayerSelectionCtrl->SetBoardFrame( m_Parent ); m_LayerSelectionCtrl->Resync(); @@ -269,12 +268,7 @@ bool DIALOG_TEXT_PROPERTIES::TransferDataToWindow() m_statusLine->Show( false ); } - if( m_LayerSelectionCtrl->SetLayerSelection( m_item->GetLayer() ) < 0 ) - { - wxMessageBox( _( "This item was on a non-existing layer.\n" - "It has been moved to the first layer." ) ); - m_LayerSelectionCtrl->SetSelection( 0 ); - } + m_LayerSelectionCtrl->SetLayerSelection( m_item->GetLayer() ); m_textWidth.SetValue( m_edaText->GetTextSize().x ); m_textHeight.SetValue( m_edaText->GetTextSize().y ); diff --git a/pcbnew/dialogs/panel_modedit_defaults.cpp b/pcbnew/dialogs/panel_modedit_defaults.cpp index ef09c442ab..151a7bd5d6 100644 --- a/pcbnew/dialogs/panel_modedit_defaults.cpp +++ b/pcbnew/dialogs/panel_modedit_defaults.cpp @@ -185,7 +185,7 @@ PANEL_MODEDIT_DEFAULTS::PANEL_MODEDIT_DEFAULTS( FOOTPRINT_EDIT_FRAME* aFrame, PA attr = new wxGridCellAttr; attr->SetRenderer( new GRID_CELL_LAYER_RENDERER( m_frame ) ); - attr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, LSET::ForbiddenTextLayers() ) ); + attr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, {} ) ); m_textItemsGrid->SetColAttr( 2, attr ); // Work around a bug in wxWidgets where it fails to recalculate the grid height diff --git a/pcbnew/exporters/export_idf.cpp b/pcbnew/exporters/export_idf.cpp index b3c5827ca7..b77812d81c 100644 --- a/pcbnew/exporters/export_idf.cpp +++ b/pcbnew/exporters/export_idf.cpp @@ -75,7 +75,7 @@ static void idf_export_outline( BOARD* aPcb, IDF3_BOARD& aIDFBoard ) aIDFBoard.GetUserOffset( offX, offY ); // Retrieve segments and arcs from the board - for( auto item : aPcb->Drawings() ) + for( BOARD_ITEM* item : aPcb->Drawings() ) { if( item->Type() != PCB_SHAPE_T || item->GetLayer() != Edge_Cuts ) continue; @@ -273,8 +273,7 @@ UseBoundingBox: * compiles data for the PLACEMENT section and compiles data for * the library ELECTRICAL section. */ -static void idf_export_module( BOARD* aPcb, MODULE* aModule, - IDF3_BOARD& aIDFBoard ) +static void idf_export_module( BOARD* aPcb, MODULE* aModule, IDF3_BOARD& aIDFBoard ) { // Reference Designator std::string crefdes = TO_UTF8( aModule->Reference().GetShownText() ); @@ -294,9 +293,9 @@ static void idf_export_module( BOARD* aPcb, MODULE* aModule, // TODO: If module cutouts are supported we must add code here // for( EDA_ITEM* item = aModule->GraphicalItems(); item != NULL; item = item->Next() ) // { - // if( ( item->Type() != PCB_FP_SHAPE_T ) - // || (item->GetLayer() != Edge_Cuts ) ) continue; - // code to export cutouts + // if( item->Type() != PCB_FP_SHAPE_T || item->GetLayer() != Edge_Cuts ) + // continue; + // code to export cutouts // } // Export pads diff --git a/pcbnew/plot_board_layers.cpp b/pcbnew/plot_board_layers.cpp index 84a4f905aa..8ba7f788ad 100644 --- a/pcbnew/plot_board_layers.cpp +++ b/pcbnew/plot_board_layers.cpp @@ -56,6 +56,7 @@ static void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, const PCB_PLOT_PARAMS& aPlotOpt, int aMinThickness ); + void PlotOneBoardLayer( BOARD *aBoard, PLOTTER* aPlotter, PCB_LAYER_ID aLayer, const PCB_PLOT_PARAMS& aPlotOpt ) { @@ -381,17 +382,17 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, aPlotter->StartBlock( NULL ); - for( auto track : aBoard->Tracks() ) + for( TRACK* track : aBoard->Tracks() ) { - const VIA* Via = dyn_cast( track ); + const VIA* via = dyn_cast( track ); - if( !Via ) + if( !via ) continue; // vias are not plotted if not on selected layer, but if layer is SOLDERMASK_LAYER_BACK // or SOLDERMASK_LAYER_FRONT, vias are drawn only if they are on the corresponding // external copper layer - LSET via_mask_layer = Via->GetLayerSet(); + LSET via_mask_layer = via->GetLayerSet(); if( aPlotOpt.GetPlotViaOnMaskLayer() ) { @@ -415,10 +416,10 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, if( ( aLayerMask & LSET::AllCuMask() ).any() ) width_adj = itemplotter.getFineWidthAdj(); - int diameter = Via->GetWidth() + 2 * via_margin + width_adj; + int diameter = via->GetWidth() + 2 * via_margin + width_adj; /// Vias not connected to copper are optionally not drawn - if( onCopperLayer && !Via->FlashLayer( aLayerMask ) ) + if( onCopperLayer && !via->FlashLayer( aLayerMask ) ) continue; // Don't draw a null size item : @@ -427,16 +428,16 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, // Some vias can be not connected (no net). // Set the m_NotInNet for these vias to force a empty net name in gerber file - gbr_metadata.m_NetlistMetadata.m_NotInNet = Via->GetNetname().IsEmpty(); + gbr_metadata.m_NetlistMetadata.m_NotInNet = via->GetNetname().IsEmpty(); - gbr_metadata.SetNetName( Via->GetNetname() ); + gbr_metadata.SetNetName( via->GetNetname() ); COLOR4D color = aPlotOpt.ColorSettings()->GetColor( - LAYER_VIAS + static_cast( Via->GetViaType() ) ); + LAYER_VIAS + static_cast( via->GetViaType() ) ); // Set plot color (change WHITE to LIGHTGRAY because the white items are not seen on a // white paper or screen aPlotter->SetColor( color != WHITE ? color : LIGHTGRAY ); - aPlotter->FlashPadCircle( Via->GetStart(), diameter, plotMode, &gbr_metadata ); + aPlotter->FlashPadCircle( via->GetStart(), diameter, plotMode, &gbr_metadata ); } aPlotter->EndBlock( NULL ); @@ -444,7 +445,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, gbr_metadata.SetApertureAttrib( GBR_APERTURE_METADATA::GBR_APERTURE_ATTRIB_CONDUCTOR ); // Plot tracks (not vias) : - for( auto track : aBoard->Tracks() ) + for( TRACK* track : aBoard->Tracks() ) { if( track->Type() == PCB_VIA_T ) continue; @@ -464,15 +465,19 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, { ARC* arc = static_cast( track ); VECTOR2D center( arc->GetCenter() ); - auto radius = arc->GetRadius(); - auto start_angle = arc->GetArcAngleStart(); - auto end_angle = start_angle + arc->GetAngle(); + int radius = arc->GetRadius(); + double start_angle = arc->GetArcAngleStart(); + double end_angle = start_angle + arc->GetAngle(); aPlotter->ThickArc( wxPoint( center.x, center.y ), -end_angle, -start_angle, radius, width, plotMode, &gbr_metadata ); } else - aPlotter->ThickSegment( track->GetStart(), track->GetEnd(), width, plotMode, &gbr_metadata ); + { + aPlotter->ThickSegment( track->GetStart(), track->GetEnd(), width, plotMode, + &gbr_metadata ); + } + } aPlotter->EndBlock( NULL ); @@ -480,85 +485,28 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, // Plot filled ares aPlotter->StartBlock( NULL ); - // Plot all zones of the same layer & net together so we don't end up with divots where - // zones touch each other. - std::set> plotted; - NETINFO_ITEM nonet( aBoard ); for( ZONE_CONTAINER* zone : aBoard->Zones() ) { - int outlineThickness = zone->GetFilledPolysUseThickness() ? zone->GetMinThickness() : 0; - for( PCB_LAYER_ID layer : zone->GetLayerSet().Seq() ) { - auto pair = std::make_pair( layer, zone ); - - if( !aLayerMask[layer] || plotted.count( pair ) ) + if( !aLayerMask[layer] ) continue; - plotted.insert( pair ); - - SHAPE_POLY_SET aggregateArea = zone->GetFilledPolysList( layer ); + SHAPE_POLY_SET mainArea = zone->GetFilledPolysList( layer ); SHAPE_POLY_SET islands; - bool needFracture = false; // If 2 or more filled areas are combined, resulting - // aggregateArea will be simplified and fractured - // (Long calculation time) - for( int i = aggregateArea.OutlineCount() - 1; i >= 0; i-- ) + for( int i = mainArea.OutlineCount() - 1; i >= 0; i-- ) { if( zone->IsIsland( layer, i ) ) { - islands.AddOutline( aggregateArea.CPolygon( i )[0] ); - aggregateArea.DeletePolygon( i ); + islands.AddOutline( mainArea.CPolygon( i )[0] ); + mainArea.DeletePolygon( i ); } } - for( ZONE_CONTAINER* candidate : aBoard->Zones() ) - { - if( !candidate->IsOnLayer( layer ) ) - continue; - - auto candidate_pair = std::make_pair( layer, candidate ); - - if( plotted.count( candidate_pair ) ) - continue; - - if( candidate->GetNetCode() != zone->GetNetCode() ) - continue; - - // Merging zones of the same net can be done only for areas having compatible - // settings for filling as the merged zone can only have a single setting. - int candidateOutlineThickness = candidate->GetFilledPolysUseThickness() ? - candidate->GetMinThickness() : 0; - - if( candidateOutlineThickness != outlineThickness ) - continue; - - plotted.insert( candidate_pair ); - - SHAPE_POLY_SET candidateArea = candidate->GetFilledPolysList( layer ); - - for( int i = candidateArea.OutlineCount() - 1; i >= 0; i-- ) - { - if( candidate->IsIsland( layer, i ) ) - { - islands.AddOutline( candidateArea.CPolygon( i )[0] ); - candidateArea.DeletePolygon( i ); - } - } - - aggregateArea.Append( candidateArea ); - needFracture = true; - } - - if( needFracture ) - { - aggregateArea.Unfracture( SHAPE_POLY_SET::PM_STRICTLY_SIMPLE ); - aggregateArea.Fracture( SHAPE_POLY_SET::PM_STRICTLY_SIMPLE ); - } - - itemplotter.PlotFilledAreas( zone, aggregateArea ); + itemplotter.PlotFilledAreas( zone, mainArea ); if( !islands.IsEmpty() ) { @@ -568,6 +516,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter, LSET aLayerMask, } } } + aPlotter->EndBlock( NULL ); // Adding drill marks, if required and if the plotter is able to plot them: diff --git a/pcbnew/plot_brditems_plotter.cpp b/pcbnew/plot_brditems_plotter.cpp index 8a8aa78b4e..b372eaf182 100644 --- a/pcbnew/plot_brditems_plotter.cpp +++ b/pcbnew/plot_brditems_plotter.cpp @@ -318,8 +318,8 @@ void BRDITEMS_PLOTTER::PlotFootprintTextItems( MODULE* aModule ) textLayer = textItem->GetLayer(); - if( textLayer >= PCB_LAYER_ID_COUNT ) - return; + if( textLayer == Edge_Cuts || textLayer >= PCB_LAYER_ID_COUNT ) + continue; if( !m_layerMask[textLayer] ) continue; @@ -342,17 +342,31 @@ void BRDITEMS_PLOTTER::PlotBoardGraphicItems() { switch( item->Type() ) { - case PCB_SHAPE_T: PlotPcbShape( (PCB_SHAPE*) item); break; - case PCB_TEXT_T: PlotPcbText( (PCB_TEXT*) item ); break; + case PCB_SHAPE_T: + PlotPcbShape( (PCB_SHAPE*) item ); + break; + + case PCB_TEXT_T: + if( item->GetLayer() != Edge_Cuts ) + PlotPcbText( (PCB_TEXT*) item ); + + break; case PCB_DIM_ALIGNED_T: case PCB_DIM_CENTER_T: case PCB_DIM_ORTHOGONAL_T: - case PCB_DIM_LEADER_T: PlotDimension( (DIMENSION*) item ); break; + case PCB_DIM_LEADER_T: + if( item->GetLayer() != Edge_Cuts ) + PlotDimension( (DIMENSION*) item ); - case PCB_TARGET_T: PlotPcbTarget( (PCB_TARGET*) item ); break; + break; - default: break; + case PCB_TARGET_T: + PlotPcbTarget( (PCB_TARGET*) item ); + break; + + default: + break; } } } diff --git a/pcbnew/text_mod_grid_table.cpp b/pcbnew/text_mod_grid_table.cpp index 43e37ee0c5..2206738c12 100644 --- a/pcbnew/text_mod_grid_table.cpp +++ b/pcbnew/text_mod_grid_table.cpp @@ -68,7 +68,7 @@ TEXT_MOD_GRID_TABLE::TEXT_MOD_GRID_TABLE( EDA_UNITS aUserUnits, PCB_BASE_FRAME* m_layerColAttr = new wxGridCellAttr; m_layerColAttr->SetRenderer( new GRID_CELL_LAYER_RENDERER( m_frame ) ); - m_layerColAttr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, LSET::ForbiddenTextLayers() ) ); + m_layerColAttr->SetEditor( new GRID_CELL_LAYER_SELECTOR( m_frame, {} ) ); } diff --git a/pcbnew/tools/drawing_tool.cpp b/pcbnew/tools/drawing_tool.cpp index c707b5b854..0fca07eee6 100644 --- a/pcbnew/tools/drawing_tool.cpp +++ b/pcbnew/tools/drawing_tool.cpp @@ -751,9 +751,6 @@ int DRAWING_TOOL::DrawDimension( const TOOL_EVENT& aEvent ) PCB_LAYER_ID layer = m_frame->GetActiveLayer(); - if( layer == Edge_Cuts ) // dimensions are not allowed on EdgeCuts - layer = Dwgs_User; - // Init the new item attributes auto setMeasurementAttributes = [&]( DIMENSION* aDim ) @@ -2107,8 +2104,10 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent ) for( ZONE_CONTAINER* zone : m_board->Zones() ) { for( PCB_LAYER_ID layer : LSET( zone->GetLayerSet() & lset ).Seq() ) + { if( zone->HitTestFilledArea( layer, position ) ) foundZones.push_back( zone ); + } } std::sort( foundZones.begin(), foundZones.end(),