diff --git a/pcbnew/pcb_edit_frame.cpp b/pcbnew/pcb_edit_frame.cpp
index 3e4b9ab5c1..c2e3c5d96b 100644
--- a/pcbnew/pcb_edit_frame.cpp
+++ b/pcbnew/pcb_edit_frame.cpp
@@ -506,6 +506,8 @@ BOARD_ITEM_CONTAINER* PCB_EDIT_FRAME::GetModel() const
 
 void PCB_EDIT_FRAME::redrawNetnames( wxTimerEvent& aEvent )
 {
+    bool needs_refresh = false;
+
     // Don't stomp on the auto-save timer event.
     if( aEvent.GetId() == ID_AUTO_SAVE_TIMER )
     {
@@ -522,11 +524,22 @@ void PCB_EDIT_FRAME::redrawNetnames( wxTimerEvent& aEvent )
 
     for( PCB_TRACK* track : GetBoard()->Tracks() )
     {
-        if( track->ViewGetLOD( GetNetnameLayer( track->GetLayer() ), view ) < view->GetScale() )
-            view->Update( track, KIGFX::REPAINT );
+        double lod = track->ViewGetLOD( GetNetnameLayer( track->GetLayer() ), view );
+
+        if( lod != track->GetCachedLOD() )
+        {
+            if( lod < view->GetScale() )
+            {
+                view->Update( track, KIGFX::REPAINT );
+                needs_refresh = true;
+            }
+
+            track->SetCachedLOD( lod );
+        }
     }
 
-    GetCanvas()->Refresh();
+    if( needs_refresh )
+        GetCanvas()->Refresh();
 }
 
 
diff --git a/pcbnew/pcb_track.cpp b/pcbnew/pcb_track.cpp
index 44f930974e..f9a8524365 100644
--- a/pcbnew/pcb_track.cpp
+++ b/pcbnew/pcb_track.cpp
@@ -53,6 +53,7 @@ PCB_TRACK::PCB_TRACK( BOARD_ITEM* aParent, KICAD_T idtype ) :
     BOARD_CONNECTED_ITEM( aParent, idtype )
 {
     m_Width = pcbIUScale.mmToIU( 0.2 );     // Gives a reasonable default width
+    m_CachedLOD = 0.0;                      // Set to always display
 }
 
 
diff --git a/pcbnew/pcb_track.h b/pcbnew/pcb_track.h
index 288b942c0a..999d23951b 100644
--- a/pcbnew/pcb_track.h
+++ b/pcbnew/pcb_track.h
@@ -220,6 +220,24 @@ public:
         return true;
     }
 
+    /**
+     * Get last used LOD for the track net name
+     * @return LOD from ViewGetLOD()
+     */
+    double GetCachedLOD()
+    {
+        return m_CachedLOD;
+    }
+
+    /**
+     * Set the cached LOD
+     * @param aLOD value from ViewGetLOD() or 0.0 to always display
+     */
+    void SetCachedLOD( double aLOD )
+    {
+        m_CachedLOD = aLOD;
+    }
+
     struct cmp_tracks
     {
         bool operator()( const PCB_TRACK* aFirst, const PCB_TRACK* aSecond ) const;
@@ -239,6 +257,8 @@ protected:
     int      m_Width; ///< Thickness of track, or via diameter
     VECTOR2I m_Start; ///< Line start point
     VECTOR2I m_End;   ///< Line end point
+
+    double   m_CachedLOD; ///< Last LOD used to draw this track's net
 };