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Renamed global variables:

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Drc_On => g_Drc_On
Route_Layer_TOP => g_Route_Layer_TOP
Route_Layer_BOTTOM => g_Route_Layer_BOTTOM
Track_45_Only_Allowed => g_Track_45_Only_Allowed
This commit is contained in:
Lorenzo Marcantonio
2013-03-27 19:32:12 +01:00
parent 0cbe14c12e
commit aae87178a7
18 changed files with 90 additions and 91 deletions
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pcbnew/editrack-part2.cpp
+2 -2
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@@ -73,7 +73,7 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
}
// Is the current segment Ok (no DRC error) ?
if( Drc_On )
if( g_Drc_On )
{
if( BAD_DRC==m_drc->Drc( g_CurrentTrackSegment, GetBoard()->m_Track ) )
// DRC error, the change layer is not made
@@ -150,7 +150,7 @@ bool PCB_EDIT_FRAME::Other_Layer_Route( TRACK* aTrack, wxDC* DC )
break;
}
if( Drc_On && BAD_DRC == m_drc->Drc( via, GetBoard()->m_Track ) )
if( g_Drc_On && BAD_DRC == m_drc->Drc( via, GetBoard()->m_Track ) )
{
// DRC fault: the Via cannot be placed here ...
delete via;