Support padstacks in annular width and edge clearance DRC
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+43
-1
@@ -872,6 +872,31 @@ void PADSTACK::ForEachUniqueLayer( const std::function<void( PCB_LAYER_ID )>& aM
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}
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std::vector<PCB_LAYER_ID> PADSTACK::UniqueLayers() const
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{
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switch( Mode() )
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{
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default:
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case MODE::NORMAL:
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return { F_Cu };
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case MODE::FRONT_INNER_BACK:
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return { F_Cu, INNER_LAYERS, B_Cu };
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case MODE::CUSTOM:
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{
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std::vector<PCB_LAYER_ID> layers;
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int layerCount = m_parent ? m_parent->BoardCopperLayerCount() : MAX_CU_LAYERS;
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for( PCB_LAYER_ID layer : LAYER_RANGE( F_Cu, B_Cu, layerCount ) )
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layers.push_back( layer );
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return layers;
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}
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}
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}
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PCB_LAYER_ID PADSTACK::EffectiveLayerFor( PCB_LAYER_ID aLayer ) const
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{
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switch( static_cast<int>( aLayer ) )
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@@ -911,7 +936,24 @@ PCB_LAYER_ID PADSTACK::EffectiveLayerFor( PCB_LAYER_ID aLayer ) const
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wxString::Format( wxT( "Unhandled layer %d in PADSTACK::EffectiveLayerFor" ),
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aLayer ) );
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return Mode() == MODE::CUSTOM ? aLayer : INNER_LAYERS;
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if( Mode() == MODE::FRONT_INNER_BACK )
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return INNER_LAYERS;
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// Custom padstack: Clamp to parent board's stackup if present
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if( m_parent )
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{
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LSET boardCopper = m_parent->BoardLayerSet() & LSET::AllCuMask();
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if( boardCopper.Contains( aLayer ) )
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return aLayer;
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// We're asked for an inner copper layer not present in the board. There is no right
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// answer here, so fall back on the front shape
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return ALL_LAYERS;
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}
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// No parent, just pass through
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return aLayer;
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}
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case MODE::NORMAL:
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