diff --git a/qa/pcbnew_utils/board_test_utils.cpp b/qa/pcbnew_utils/board_test_utils.cpp
index 0eb6e77bd9..4ab37a09f4 100644
--- a/qa/pcbnew_utils/board_test_utils.cpp
+++ b/qa/pcbnew_utils/board_test_utils.cpp
@@ -106,21 +106,31 @@ void LoadBoard( SETTINGS_MANAGER& aSettingsManager, const wxString& aRelPath,
 
     auto m_DRCEngine = std::make_shared<DRC_ENGINE>( aBoard.get(), &aBoard->GetDesignSettings() );
 
+    BOOST_TEST_CHECKPOINT( "Init drc engine" );
+
     if( rulesFile.Exists() )
         m_DRCEngine->InitEngine( rulesFile );
     else
         m_DRCEngine->InitEngine( wxFileName() );
 
     aBoard->GetDesignSettings().m_DRCEngine = m_DRCEngine;
+
+    BOOST_TEST_CHECKPOINT( "Build list of nets" );
     aBoard->BuildListOfNets();
+
+    BOOST_TEST_CHECKPOINT( "Build connectivity" );
     aBoard->BuildConnectivity();
+
+    BOOST_TEST_CHECKPOINT( "Synchronize Time Domain Properties" );
     aBoard->GetLengthCalculation()->SynchronizeTimeDomainProperties();
 
     if( aBoard->GetProject() )
     {
         std::unordered_set<wxString> dummy;
+        BOOST_TEST_CHECKPOINT( "Synchronize Component Classes" );
         aBoard->SynchronizeComponentClasses( dummy );
 
+        BOOST_TEST_CHECKPOINT( "Run DRC cache generator" );
         DRC_CACHE_GENERATOR cacheGenerator;
         cacheGenerator.SetDRCEngine( m_DRCEngine.get() );
         cacheGenerator.Run();
@@ -275,6 +285,8 @@ void LoadAndTestFootprintFile( const wxString& aLibRelativePath, const wxString&
 
 void FillZones( BOARD* m_board )
 {
+    BOOST_TEST_CHECKPOINT( "Filling zones" );
+
     TOOL_MANAGER toolMgr;
     toolMgr.SetEnvironment( m_board, nullptr, nullptr, nullptr, nullptr );
 
@@ -291,6 +303,7 @@ void FillZones( BOARD* m_board )
     if( filler.Fill( toFill, false, nullptr ) )
         commit.Push( _( "Fill Zone(s)" ), SKIP_UNDO | SKIP_SET_DIRTY | ZONE_FILL_OP | SKIP_CONNECTIVITY );
 
+    BOOST_TEST_CHECKPOINT( "Building connectivity (after zone fill)" );
     m_board->BuildConnectivity();
 }
 
diff --git a/qa/tests/pcbnew/drc/test_drc_copper_sliver.cpp b/qa/tests/pcbnew/drc/test_drc_copper_sliver.cpp
index e19e8cafe4..12adab15d8 100644
--- a/qa/tests/pcbnew/drc/test_drc_copper_sliver.cpp
+++ b/qa/tests/pcbnew/drc/test_drc_copper_sliver.cpp
@@ -85,6 +85,7 @@ BOOST_DATA_TEST_CASE_F( DRC_REGRESSION_TEST_FIXTURE, DRCCopperSliver,
                     violations.push_back( *aItem );
             } );
 
+    BOOST_TEST_CHECKPOINT( "Running copper sliver drc" );
     bds.m_DRCEngine->RunTests( EDA_UNITS::MM, true, false );
 
     if( violations.size() == test.second )