From 459473ccc362f904f75d8bef35bb6aba18d57d32 Mon Sep 17 00:00:00 2001 From: Jon Evans Date: Fri, 17 Feb 2023 19:48:55 -0500 Subject: [PATCH] PNS: Safety for evaluating item nets for rules Fixes https://gitlab.com/kicad/code/kicad/-/issues/13993 --- pcbnew/pcb_expr_functions.cpp | 3 +++ pcbnew/router/pns_kicad_iface.cpp | 3 +++ 2 files changed, 6 insertions(+) diff --git a/pcbnew/pcb_expr_functions.cpp b/pcbnew/pcb_expr_functions.cpp index 5cb1111924..018caab8bb 100644 --- a/pcbnew/pcb_expr_functions.cpp +++ b/pcbnew/pcb_expr_functions.cpp @@ -896,6 +896,9 @@ static void inDiffPairFunc( LIBEVAL::CONTEXT* aCtx, void* self ) { NETINFO_ITEM* netinfo = static_cast( item )->GetNet(); + if( !netinfo ) + return 0.0; + wxString refName = netinfo->GetNetname(); wxString arg = argv->AsString(); wxString baseName, coupledNet; diff --git a/pcbnew/router/pns_kicad_iface.cpp b/pcbnew/router/pns_kicad_iface.cpp index cf5a68dd63..4ddb79ef05 100644 --- a/pcbnew/router/pns_kicad_iface.cpp +++ b/pcbnew/router/pns_kicad_iface.cpp @@ -738,6 +738,9 @@ bool PNS_KICAD_IFACE_BASE::ImportSizes( PNS::SIZES_SETTINGS& aSizes, PNS::ITEM* int holeToHoleMin = bds.m_HoleToHoleMin; PNS::VIA dummyVia; + if( aStartItem ) + dummyVia.SetNet( aStartItem->Net() ); + if( m_ruleResolver->QueryConstraint( PNS::CONSTRAINT_TYPE::CT_HOLE_TO_HOLE, &dummyVia, &dummyVia, UNDEFINED_LAYER, &constraint ) ) {