From 0a28956cf8fbb60b76d03a2b22efdd3c4591d8a7 Mon Sep 17 00:00:00 2001
From: Jeff Young <jeff@rokeby.ie>
Date: Wed, 12 Jul 2023 10:40:02 +0100
Subject: [PATCH] Replace misssing "if" stmt and make outer "if" catch all
 cases of log scales.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/15174
---
 eeschema/sim/sim_plot_tab.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/eeschema/sim/sim_plot_tab.cpp b/eeschema/sim/sim_plot_tab.cpp
index 6eba493392..de57d208b7 100644
--- a/eeschema/sim/sim_plot_tab.cpp
+++ b/eeschema/sim/sim_plot_tab.cpp
@@ -832,9 +832,10 @@ void SIM_PLOT_TAB::SetTraceData( TRACE* trace, unsigned int aPoints, const doubl
     std::vector<double> x( aX, aX + aPoints );
     std::vector<double> y( aY, aY + aPoints );
 
-    if( GetSimType() == ST_AC || GetSimType() == ST_SP || GetSimType() == ST_FFT )
+    if( dynamic_cast<LOG_SCALE<mpScaleXLog>*>( m_axis_x ) )
     {
         // log( 0 ) is not valid.
+        if( x.size() > 0 && x[0] == 0 )
         {
             x.erase( x.begin() );
             y.erase( y.begin() );