6567a9da07
fix: solder mask margin in nanometers #81
2023-08-19 20:25:52 +03:00
57fd582a6d
fix: normalized generated filename #85
2023-08-18 15:13:39 +03:00
9d18a8bc54
Merge pull request #82 - verify-zone-fills
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Verify zone fills
2023-08-09 11:19:28 +03:00
df06c3c867
We need to rebuild the connectivity db after zones has been refilled
2023-08-04 12:44:03 +02:00
8beb878d32
Make sure all zones are updated before starting an export
2023-08-04 12:23:50 +02:00
ef138c8feb
chore: bump versio to v3
2023-07-06 14:22:53 +03:00
466c008228
chore: bump version
2023-07-06 14:11:32 +03:00
c8e3daa5ae
Merge pull request #75 from bennymeg/bennymeg-patch-2
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chore: update readme v-cut layer #71
2023-07-06 14:09:16 +03:00
a9cd57a027
chore: update readme v-cut layer #71
2023-07-06 14:08:47 +03:00
387c5b3931
Merge pull request #71
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Update process.py for V Cuts
2023-07-06 13:59:37 +03:00
2d2436993a
Merge pull request #70
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Bottom side rotates still not quite right
2023-07-06 13:44:16 +03:00
376d6df61d
Update process.py for V Cuts
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Adds User_1 layer to Edge_Cuts file.
It seems JLCPCB want V cuts in the file as Edge Cuts.
So simply make User_1 a V Cuts layer.
Alternative would be for config for plotPlan to take array of layers to include, not just one later, but my python is not that good.
2023-06-26 18:16:43 +01:00
f832e4e007
Bottom side rotates still not quite right
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Inverting around 360 degrees looked fine for angles, even 45 degrees and 10 degrees and so on, but turns out it actually needs inverting around 180 degrees else your diodes are all backwards. Arrrg.
2023-06-21 11:13:11 +01:00
d42611753e
Merge pull request #67 from Fisheiyy/naming-rework
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Output folder name rework & Minor correction
2023-06-14 10:06:55 +03:00
ac0fec8faf
Update thread.py
2023-06-13 20:35:21 -05:00
2ac859e7e7
exclude .csv & .ipc) from gerber archive
2023-06-13 02:33:24 -05:00
830819b27b
Only delete temp_dir if files successfully copied to output_path
2023-06-12 19:42:26 -05:00
9832454472
Merge pull request #66 from Fisheiyy/master
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Add Support for all 32 possible Copper Layers
2023-06-12 14:10:04 +03:00
468640df8a
Output Folder Name Rework & Minor Correction
2023-06-12 05:59:32 -05:00
db4bf8904a
Fix Error (over 32 layer max)
2023-06-11 03:44:44 -05:00
1a9d56d0a9
Add support for 32 Layers (Max Amount)
2023-06-10 23:10:22 -05:00
50ad485758
Merge pull request #62
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Explain the need to update PCB after adding rotation/position offset
2023-05-30 12:28:37 +03:00
3954ba9b68
Update README.md #57
2023-05-30 12:25:12 +03:00
3c1254eb9c
Explain the need to update PCB after adding rotation/position offset
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I was having the same problem as presented in #41 and realized that I needed to update the PCB after entering a rotation offset in the Schematic Editor. This PR adds documentation to point this out and help others avoid the same frustration.
2023-05-19 13:29:51 -07:00
f10292a797
Merge branch 'master' of https://github.com/bennymeg/JLC-Plugin-for-KiCad
2023-05-18 20:06:52 +03:00
1d5a1b244e
feat: orginize gerber archive #15 #61
2023-05-18 20:06:47 +03:00
c88232dbaf
Merge pull request #60 from bennymeg/bennymeg-patch-1
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Update README.md
2023-05-14 22:35:00 +03:00
9e78ed2f18
Update README.md
2023-05-14 22:34:34 +03:00
99344155b5
Merge pull request #59
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Fix rotation offset field name
2023-05-14 22:23:20 +03:00
7a7a04a714
Fix rotation offset field name
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The name of the field doesn't match the value the code actually looks for. The name of the field is correct elsewhere in the document.
2023-05-12 13:04:12 -04:00
4a59fb0672
feat: added support for 8 layers PCBs, closes #56
2023-05-11 10:05:40 +03:00
5afaa579f8
Merge pull request #52
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Correct rotation for bottom layer
2023-04-30 21:36:42 +03:00
a1519203c1
Merge pull request #55 from tobsec/patch-1
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Fix wrong position key in README.md
2023-04-30 21:35:10 +03:00
37b039b515
Update README.md
2023-04-28 12:14:28 +02:00
db103a5775
fix: metadata version
2023-04-28 13:02:40 +03:00
8394c85f15
Correct rotation for bottom layer
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Fix #51
2023-04-13 11:03:02 +01:00
b783e7bd3e
feat: set DNP as MPN #37
2023-03-25 20:46:48 +03:00
e13276ae62
chore: refactor
2023-03-23 20:17:57 +02:00
523a48cdff
Merge pull request #46
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Don't merge similar components with different LCSC part numbers
2023-03-23 20:16:44 +02:00
f51c44fb00
Merge branch 'master' of https://github.com/bennymeg/JLC-Plugin-for-KiCad
2023-03-23 20:15:30 +02:00
817a58e8cc
chore: misc
2023-03-23 20:15:22 +02:00
11d48c1370
feat: add user comments to gerber, closes #16
2023-03-23 20:13:51 +02:00
0db7b02636
Don't merge similar components with different LCSC part numbers
2023-03-23 10:15:12 -06:00
e90cb33e6a
Merge pull request #44
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Change encoding of output files to UTF-8 with BOM
2023-03-23 13:23:02 +02:00
67d725a96f
Update process.py
2023-03-21 22:46:50 +09:00
c62f1e3c1e
fix: solder mask margin as per JLCPCB guidelines #34
2023-03-17 16:02:53 +02:00
68b5eb639a
chore: removed unwanted footprint key
2023-03-14 11:48:19 +02:00
9f0fa6eaee
Merge pull request #42
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Add new symbol field support for easyeda2kicad.py
2023-03-14 11:40:41 +02:00
6adb746943
Add new symbol field support for easyeda2kicad.py
2023-03-13 22:42:09 -04:00
79bd50db9e
chore: bump version
2023-02-22 12:28:05 +02:00
Benny Megidish