diff --git a/plip_voice/main/es8388.c b/plip_voice/main/es8388.c
index d7a5510..e77a470 100644
--- a/plip_voice/main/es8388.c
+++ b/plip_voice/main/es8388.c
@@ -160,6 +160,7 @@ esp_err_t es8388_init(void)
     if (i2c_write_reg(ES8388_ADC_CTL3, 0x02) != ESP_OK) return ESP_FAIL; /* DS filter sel */
     if (i2c_write_reg(ES8388_ADC_CTL4, 0x0C) != ESP_OK) return ESP_FAIL; /* I2S 16-bit */
     if (i2c_write_reg(ES8388_ADC_CTL5, 0x02) != ESP_OK) return ESP_FAIL; /* RATIO=256 */
+    if (i2c_write_reg(0x0E, 0x00) != ESP_OK) return ESP_FAIL; /* ADCCONTROL6: clear ADCSMUTE bit5 (reset default 0x30 = ADC output muted) */
     if (i2c_write_reg(ES8388_ADC_CTL8, 0x00) != ESP_OK) return ESP_FAIL; /* ADC vol L 0dB */
     if (i2c_write_reg(ES8388_ADC_CTL9, 0x00) != ESP_OK) return ESP_FAIL; /* ADC vol R 0dB */
 
@@ -202,9 +203,12 @@ esp_err_t es8388_init(void)
     /* 13. DAC power: power up DAC L+R. */
     if (i2c_write_reg(ES8388_DAC_POWER, 0x3C) != ESP_OK) return ESP_FAIL;
 
-    /* 14. ADC power: power up ADC (0x09 per Espressif reference).
-     * Must come AFTER DACCONTROL21 state machine restart and all ADC register writes. */
-    if (i2c_write_reg(ES8388_ADC_POWER, 0x09) != ESP_OK) return ESP_FAIL;
+    /* 14. ADC power: full power-up (all Pdn bits cleared = 0x00).
+     * 0x09 is the intermediate state (Espressif es8388_open end-state), but
+     * the full ADC + analog input power-up requires 0x00 (Espressif es8388_start(ADC)).
+     * Must come AFTER DACCONTROL21 state machine restart and ADCCONTROL6 unmute. */
+    if (i2c_write_reg(ES8388_ADC_POWER, 0x00) != ESP_OK) return ESP_FAIL;
+    vTaskDelay(pdMS_TO_TICKS(10));  /* let ADC analog settle after full power-up */
 
     /* 15. Enable PA (power amplifier for speaker). */
     gpio_set_direction(PLIP_PA_ENABLE, GPIO_MODE_OUTPUT);
diff --git a/plip_voice/sdkconfig.defaults b/plip_voice/sdkconfig.defaults
index 20540ad..b6f354d 100644
--- a/plip_voice/sdkconfig.defaults
+++ b/plip_voice/sdkconfig.defaults
@@ -35,6 +35,10 @@ CONFIG_ESP_TASK_WDT_TIMEOUT_S=15
 # when I2S/WiFi interrupts spill into idle stack on original ESP32.
 CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2048
 
+# SLIC hook GPIO — SHK on GPIO23 (A1S KEY4, active-HIGH: HIGH = off-hook)
+CONFIG_PLIP_HOOK_GPIO=23
+CONFIG_PLIP_HOOK_ACTIVE_HIGH=y
+
 # WiFi credentials — set via `idf.py menuconfig` (PLIP Voice Configuration)
 # or override locally in sdkconfig (NOT committed).
 # CONFIG_PLIP_WIFI_SSID="..."